The present invention concerns an electrically addressable, non-volatile read-only memory, comprising a plurality of memory cells which in a write operation comprising a part of the manufacturing process of the read-only memory, permanently each are assigned one or two or more logic states according to a determined protocol which in the memory defines permanently written or stored data, and a passive matrix of electrical conductors for the addressing, wherein the passive electrical conductor matrix comprises a first and a second electrode structure in respective mutually spaced apart and parallel planes and with parallel electrodes in each plane and provided such that the electrodes form a substantially orthogonal x,y matrix wherein the electrodes in the first electrode structure comprise the columns of the matrix or x electrodes and the electrodes in the second electrode structure comprise the rows of the matrix or y electrodes, wherein at least a portion of the volume between the intersection of an x electrode and a y electrode defines a memory cell in the read-only memory, wherein a contact area in the memory cell is defined by the portions which respectively extend along each side edge of the y electrode where it overlaps the x electrode in the memory cell, wherein are provided at least one semiconductor material with rectifying properties in relation to a selected electrical conducting electrode material, and a first electrical isolating material, and wherein the semiconductor material in electrical contact with an electrode in the memory cell forms a diode junction in the interface between semiconductor material and electrode material.
The invention also concerns a read-only memory device which comprises one or more read-only memories according to the invention, and a read-only memory device which comprises two or more read-only memories according to the invention.